In the fabrication of semiconductor chips, processing typically includes the deposition of a particle layer on existing layers. This may include deposition of metallization layers for interconnection or bonding, wherein copper is increasingly used as a replacement for aluminum due to its low electrical resistance and high thermal conductivity. Such metallization layers may be produced using a particle deposition process. However, due to the significantly different coefficients of thermal expansion (CTE) of copper and silicon, high mechanical stress may occur when temperature changes. Delamination of the copper layer and crack formation may be the consequences. Deposition of porous copper layers may alleviate the above-mentioned problem of thermal mechanical stress. However, the plasma or electro-chemical processes currently used for deposition of porous copper layers are comparably complex and expensive.
There is therefore a need for an improved method for processing semiconductor wafers or dies, particularly for producing porous copper layers, which form electrical interconnects on the semiconductor wafer or die.